Digital data processing systems are employed in many applications, including a variety of laboratory process control, real time data analysis, and real time data reduction operations. In many process control applications, it would be desirable to perform process control with fast time response (for example, where a large vector of input data is received during each control cycle, or where a matrix multiplication is required during each control cycle). It would also be desirable in many applications to perform high speed real time analysis or reduction on large amounts of data.
High speed real time data reduction is often desirable in connection with long pulse or steady state experiments in which the amount of data generated far exceeds the capacity to store data for later analysis. In such cases, real time data reduction results in extraction of a limited set of parameters for storage. It is often desirable to perform high speed real time analysis to search for signatures of interesting events which indicate time intervals during which data should be stored or processed.
Microprocessors having very high processing speed are commercially available. For example, the 64-bit Intel 80860 microprocessor (commercially available from Intel Corporation, and sometimes referred to herein as an "i860" processor) can perform as many as 80 million floating point operations per second simultaneously with 40 million integer (scalar unit) operations per second. It is likely that the processing speed of commercially available microprocessors will increase in the future.
However, high speed real time data analysis (and other high speed digital data processing) requires not only means for high speed data processing, but also means for high speed acquisition of the data to be processed. High speed data acquisition is particularly important when a large number of sensors must be sampled during each analysis cycle.
Until the present invention, it had not been known how to implement high speed data acquisition, for example with acquisition rates of 40 million data values (such as fourteen-bit data words) per second. Nor had it been known how to implement high speed acquisition of integer-format data, high speed conversion of the integer-format data to floating-point format, and high speed transfer of such floating-point format data to a floating-point processor (for example, transfer of 40 million fourteen-bit integer-format words per second to a floating-point processor to enable real time, floating-point processing of 40 million 32-bit floating-point format data words per second).
Nor had it been known how to implement high speed data acquisition in any selected combination of several user-selectable data transfer start and stop modes.